• Co-Founder and COO @ Aroob Technologies Ltd [Jan 2020 – Present]
  • President @ TecHub – Igniting curiosity and bringing ideas under spotlight [Nov 2015 – Sept 2016]

Research & Professional Activities

Centre Technical Manager @ CeADAR – Ireland’s National Centre for Applied AI, UCD, Dublin (March 2022 – Present)

Leading the CeADAR Connect Program.

Research Scientist @ Insight SFI Centre of Data Analytics, UCD, Dublin (August 2020 – February 2022)

Worked on two EU H2020 funded projects and an Enterprise Ireland Funded DTIF project in the areas of healthcare and data analytics.

Researcher (PhD) @ Huawei Irish Research Center (IRC) , Dublin (Dec 2019 – July 2020)

Worked on the following projects:

  1. Machine learning-based anomaly detection framework for Metrics in Intelligent Cloud Monitoring.
  2. Anomaly detection algorithm for latency for intelligent trace selection framework.
  3. Resource optimization for next-generation cloud-based data centers supporting Huawei Intent-Driven Networks (IDN).

Doctoral Researcher @ Heterogeneous Computing Lab (HCL) , UCD, Dublin (Sept 2016 – May 2020)

The Heterogeneous Computing Laboratory (HCL) aspires to be one of the world research leaders in the field of high performance heterogeneous computing. The vision is to propose and develop innovative ideas, models, algorithms and tools aimed at efficient and reliable solution of most challenging scientific and engineering problems on modern highly heterogeneous and hierarchical HPC platforms.

Research Associate @ EMWITECH (July 2015 – Sept 2016)

EMWITECH is a research platform for Embedded and Wireless Technology. This platform covers research in the domain of Advanced computer architecture specifically buffer architectures, Reconfigurable Multicore processors and Artificial intelligence. EMWITECH also focuses research in the area of computer networks, Network security and secure communication.

Team lead in a research project titled, “EMWIBENCH: A Benchmark suite for Hard Real time Systems”

Research Assistant @ Advanced Computer Architecture Lab, HITEC University, Pakistan (September 2013 – November 2015)

(Project Description) The saturation of design complexity and clock frequencies for single-core processors have resulted in the emergence of the multicore architectures as an alternative design paradigm. In the recent trends, multicore/ multithreaded computing systems are not only a de facto standard for high-end applications but are gaining popularity in the field of embedded computing. The advanced level research on multicore architectures requires the development of a high-end test bed for the exploration of hardware and software. Therefore, we propose an FPGA based multicore reconfigurable architecture that will support MS and Ph.D. level research and development in the areas of multicore-processing including core design, memory management, thread scheduling, application support, inter-processor communication, debugging, power management, run-time reconfiguration, real-time applications and many more. The scope of this research project included the development of an FPGA based reconfigurable multi-core architecture that supports runtime reconfiguration of cache size and associativity, number of cores and operating frequency. Using the performance counters we were able to have a feedback of energy consumption, application throughput, and cache miss rate. The project also included the development of Fuzzy logic, Neural Nets, Game Programming or similar Artificial Intelligence (AI) based algorithm to strike a balance between throughput and energy consumption of work-load (applications).

(Contributions & Tasks) As a RA my duties/tasks and contributions in this project were,

  • Mathematical modeling of energy and throughput for Caches in MPSoCS and analytical evaluation/ verification of models.
  • Exploring Cycle accurate full system simulators i.e. MARSS. Developing configuration for XEON multicore processors and various other processor simulators e.g Cacti, MCPAT etc.
  • Updating OS on system simulators, Kernel level OS optimization, Analyzing various processor parameters
  • Development of parallel programming models, Development of Hard real-time Benchmarks. Improving JetBench

Teaching Activities

Lecturer @ School of Computer Science, UCD, Dublin (September 2019 – January 2020)

Snr. Demonstrator @ School of Computer Science, UCD, Dublin (September 2016 – December 2021)

Following is the list of modules I have been demonstrating at UCD:

  • Unix Programming (COMP20200) – Spring 2020
  • Parallel and Cluster Computing (COMP30250) – Fall 2019
  • Introduction to Operating Systems (COMP20070) – Spring 2019
  • Computer Programming II (COMP10120) – Spring 2019
  • Unix Programming (COMP20200) – Spring 2019
  • Data Science in Practice (COMP30780) – Spring 2019
  • Processor Design (COMP30080) – Fall 2018
  • Digital System (COMP20020) – Fall 2018
  • Computer Science for Engineers II (COMP20080) – Fall 2018
  • High Performance Computing (COMP40730) – Spring 2018
  • Information Visualisation (COMP30750) – Spring 2018
  • Computer Programming II (COMP10120) – Spring 2018
  • Unix Programming (COMP20200) – Spring 2018
  • Processor Design (COMP30080) – Fall 2017
  • Digital System (COMP20020) – Fall 2017
  • Object-orientated programming (COMP30070) – Fall 2017
  • Computer Programming II (COMP10120) – Spring 2017
  • Unix Programming (COMP20200) – Spring 2017
  • Cloud Computing (COMP41110) – Fall 2016